[Elsnet-list] HLDVT 2010 Paper submission deadline extended to
shireesh at gmail.com
Sat Mar 6 05:50:23 CET 2010
We apologize if you receive multiple copies of this CFP.
Please distribute to anyone who may be interested.
*Call for Papers*
IEEE International High-Level Design Validation and Test Workshop Collocated
with DAC 2010, Anaheim, California, June 10–12, 2010
The fifteenth annual workshop HLDVT 2010 aims to bring together a community
of researchers in the areas of design, validation, and test. The workshop
addresses the integration of multiple functions on-chip at higher levels of
design abstraction, and the techniques and methodologies for modeling,
analyzing, and validating such systems. In particular, the workshop has
become a unique forum for researchers and practitioners to discuss the
practical issues associated with validation of extremely large designs.
*Topics of interest include, but are not limited to:*
• Simulation-Based Validation
• Formal Verification and Hybrid Methods
• Design Abstraction & Behavioral Modeling
• Error Trace Interpretation and Debugging
• On-Chip and Core-Based Testing
• Test Generation for Defects, Design Errors, and Delay
• Hardware/Software and Mixed-signal System Co-Validation
• Emulation and Prototyping
• Post-silicon Validation and Debug
*Paper Submission:* The Program Committee invites authors to submit papers
not to exceed 8 pages (IEEE two-column conference format with 10pt minimum
font size) describing original and unpublished work. Panels and special
session proposals are also invited. All submissions must be made
electronically in PDF format using the paper submission webpage:
http://www.hldvt.com/submissions . Please ensure that all the required
contact details are entered during online submission.
*Paper Publication and Presenter Registration:* The submission of a paper or
panel proposal will be considered as evidence that upon acceptance, the
author(s) will present their paper. For the papers to appear in the program
and proceedings, required is at least one full workshop registration by an
author before the submis- sion of camera-ready version. IEEE reserves the
right to exclude a paper from distribution (e.g., removal from IEEE Xplore)
if the paper is not presented at the workshop.
Submission deadline: March 14, 2010
Acceptance Notification: April 6, 2010
Final manuscript: April 19, 2010
Questions regarding paper submissions and the program may be ad- dressed to
the program chair: Zeljko Zilic, programchair at hldvt.com. Other questions may
be addressed to the general chair: Prabhat Mishra, generalchair at hldvt.com.
Additional pertinent information will be made available at
Journal Special Section: The best papers on validation of multicore systems
will be considered for inclusion in a special section of IEEE Design and
Test of Com- puters, to be published in May 2011.
HLDVT 2010 is sponsored by the IEEE Computer Society Test Technology Tech-
nical Council and the IEEE CS Design Automation Technical Committee.
Prabhat Mishra, Univ. of Florida
Zeljko Zilic, McGill University
Priyank Kalla, Univ. of Utah
Hao Zheng, Univ. of South Florida
Miroslav Velev, Aries Design Automation
Web Publicity Chair
Ismet Bayraktaroglu, Sun
Shireesh Verma, Conexant
Local Arrangements Chair
Ian Harris, UC Irvine
Shankar Hemmady, Synopsys
Panel/Special Session Chair
Sandeep Shukla, Virginia Tech
Samar Abdi, Concordia Univ.
Valeria Bertacco, Univ. of Michigan
Marc Boulé, Ecole de Tech. Supérieure
Ed Cerny, Synopsys
Pankaj Chauhan, Calypto
Tim Cheng, UC Santa Barbara
Franco Fummi, Univ. di Verona
John Hayes, Univ. of Michigan
Michael Hsiao, Virginia Tech
Alan Hu, Univ. British Columbia
Nicola Nicolici, McMaster Univ.
Priyadarsan Patra, Intel
Laurence Pierre, Univ. Grenoble
Wolfgang Rosenstiel, Tu ̈bingen Univ.
Pablo Sanchez, Univ. of Cantabria
Torsten Schober, IBM Germany
Namrata Shekhar, Synopsys
Li-C. Wang, UC Santa Barbara
Jin Yang, Intel Avi Ziv, IBM
Bernard Courtois, CMP-TIMA
Masahiro Fujita, Univ. of Tokyo
Prab Varma, Blue Pearl Software
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